AADL Extension to Model Classical FPGA and FPGA Embedded within a SoC

Dominique Blouin (1) , Daniel Chillet (2) , Eric Senn (3) , Sebastien Bilavarn (4) , Robin Bonamy (2) , Christian Samoyeau (5)

1 Lab-STICC - Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (UMR 3192)
2 CAIRN - Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources
3 Lab-STICC_UBS_CACS_MOCS
4 LEAT - Laboratoire d'Electronique, Antennes et Télécommunications
5 InPixal [Rennes]

Domaines: Systèmes embarqués; Architectures Matérielles [cs.AR]

Dominique Blouin, Daniel Chillet, Eric Senn, Sebastien Bilavarn, Robin Bonamy, et al.. AADL Extension to Model Classical FPGA and FPGA Embedded within a SoC. International Journal of Reconfigurable Computing, 2011, Article ID 425401, 15 p. ⟨10.1155/2011/425401⟩. ⟨hal-00650628⟩