Hardware Simulator: Digital Block Design for Time- Varying MIMO Channels with TGn Model B Test

Bachir Habib (1) , Gheorghe Zaharia (1) , Ghaïs El Zein (1)

1 IETR - Institut d'Électronique et des Technologies du numéRique

A hardware simulator facilitates the test and validation cycles by replicating channel artifacts in a controllable and repeatable laboratory environment. Thus, it makes possible to ensure the same test conditions in order to compare the performance of various equipments. This paper presents new frequency domain and time domain architectures of the digital block of a hardware simulator of MIMO propagation channels. The two architectures are tested with WLAN 802.11ac standard, in indoor environment, using time-varying TGn 802.11n channel model B. After the description of the general characteristics of the hardware simulator, the new architectures of the digital block are presented and designed on a Xilinx Virtex-IV FPGA. Their accuracy and latency are analyzed.

Mots clés: Hardware simulator; radio channel; MIMO; FPGA; Time-varying TGn channel model B; 802.11ac

Domaines: Electronique

Bachir Habib, Gheorghe Zaharia, Ghaïs El Zein. Hardware Simulator: Digital Block Design for Time- Varying MIMO Channels with TGn Model B Test. International Conference on Telecommunications, Apr 2012, Jounieh, Lebanon. pp.1-5, ⟨10.1109/ICTEL.2012.6221269⟩. ⟨hal-00711315⟩