Towards a design space exploration tool for MPSoC platforms designs: a case study

Romain Brillu (1) , Sébastien Pillement (1) , Fabrice Lemonnier (2) , Philippe Millet (2) , Eric Lenormand (2) , Marc Bernot (3) , Frédéric Falzon (3)

1 IETR - Institut d'Électronique et des Technologies du numéRique
2 ESL - Embedded System Lab
3 TAS - Thales Alenia Space [Toulouse]

The deployment of an application onto a multicore architecture is often a long and difficult process. This is due to the fact that the characteristics of both the architecture and the application are taken into account late in the development process. It's therefore necessary to have tools pruning the solution space efficiently and accurately. In order to define such a tool, this work defines the basic metrics and step for a design space exploration ("DSE") flow. To this end our proposal have been tested and validated for a space application that requires both a high computing power and an architecture compatible with the space constraints. The results obtained are promising and have shown the viability of the approach.

Mots clés: Algorithm Architecture matching; Design Space Exploration; Platform Based Design; Phase diversity

Romain Brillu, Sébastien Pillement, Fabrice Lemonnier, Philippe Millet, Eric Lenormand, et al.. Towards a design space exploration tool for MPSoC platforms designs: a case study. Euromicro Conference on Parallel, Distributed, and Network-Based Processing (PDP'2014), Feb 2014, Turin, Italy. pp.PDP PID3016521. ⟨hal-00913758⟩