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Behavior of the parameters of microcrystalline silicon TFTs under mechanical strain

Abstract : N-type and P-type microcrystalline silicon top-gate TFTs, processed directly on PEN plastic substrate at maximum temperature of 180 °C, were mechanically stressed. These TFTs were bent by different curvature radii varying between infinite (flat) and 0.5 cm. The tensile stress increases the electron mobility and the compressive stress decreases it. The tensile stress decreases the threshold voltage of N-type TFTs while the compressive stress increases it. These trends are inversed if the type of stress changes OR the type of TFTs changes. The total behavior under mechanical stress is exactly similar to that of single crystalline silicon MOSFETs in nano-scale technologies (90, 65, 45, 32 nm), where nano-scale stress is introduced in the goal to engineer the electrical parameters. The similarity originates from the microcrystalline silicon active layer that behaves like single crystalline silicon even if the stress effects are softened by the grain boundaries and the multiple crystalline orientations of the grains.
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Contributor : Laurent Jonchère <>
Submitted on : Tuesday, May 13, 2014 - 5:10:13 PM
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Sabri Janfaoui, Claude Simon, Nathalie Coulon, Tayeb Mohammed-Brahim. Behavior of the parameters of microcrystalline silicon TFTs under mechanical strain. Solid-State Electronics, Elsevier, 2014, 93, pp.1-7. ⟨10.1016/j.sse.2013.12.001⟩. ⟨hal-00990651⟩



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