Development and optimization of high level dataflow programs: the HEVC decoder design case

Khaled Jerbi (1) , Daniele Renzi (2) , Damien de Saint-Jorre (2) , Hervé Yviquel (1) , Mickaël Raulet (1) , Claudio Alberti (2) , Marco Mattavelli (2)

1 IETR - Institut d'Électronique et des Technologies du numéRique
2 EPFL - Ecole Polytechnique Fédérale de Lausanne

With the standardization of the new High Efficiency Video Coding (HEVC) compression algorithm, a dataflow specification of the HEVC decoding process is also available as part of the standard. This paper presents methodologies to improve and optimize the performance of implementations derived by the dataflow specification. Regarding the architectural aspect of dataflow network, the throughput has been increased by developing more potential parallelism. For the platform aspect, critical processes have been optimized by applying SIMD functions and communications have been improved by cache efficient FIFO implementation. Results revealed an average acceleration factor of 7 in the decoding framerate over the reference dataflow implementation.

Domaines: Systèmes embarqués

Khaled Jerbi, Daniele Renzi, Damien de Saint-Jorre, Hervé Yviquel, Mickaël Raulet, et al.. Development and optimization of high level dataflow programs: the HEVC decoder design case. 48th Asilomar Conference on Signals, Systems and Computers, Nov 2014, Pacific Grove, United States. ⟨hal-01120927⟩