Off-line DVFS integration in MDE-based design space exploration framework for MP2SoC systems

Abstract : As the speed metric of Massively Parallel Multi-Processors System-on-Chip (MP2SoC) systems has increased over time, another metric has become more important: power consumption. Finding a tradeoff between power consumption and performance early in the design flow of MP2SoC systems in order to satisfy time-to-market is the design challenge of Electronic Design Automation (EDA) tools. This paper presents a Design Space Exploration (DSE) framework, named Energy-Aware Rapid Design of MP2SoC (EWARDS), aiming at exploring the performance and power capabilities of modern homogenous MP2SoC systems at design time using Model-Driven Engineering (MDE) techniques. The proposed framework extends the Modeling and Analysis of Real-Time and Embedded systems (MARTE)profile with power aspects of MP2SoC systems providing a high-level design entry. In addition, EWARDS integrates an energy-aware scheduler that strives to balance performance and energy savings by combining clustering scheduling algorithm with off-line Dynamic Voltage and Frequency Scaling (DVFS) power management techniques. © 2016 IEEE.
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Submitted on : Monday, September 19, 2016 - 10:22:47 AM
Last modification on : Tuesday, February 5, 2019 - 3:58:22 PM

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M. Ammar, M. Baklouti, Maxime Pelcat, K. Desnos, M. Abid. Off-line DVFS integration in MDE-based design space exploration framework for MP2SoC systems. 25th IEEE International Conference on Enabling Technologies: Infrastructure for Collaborative Enterprises, WETICE 2016, Jun 2016, Paris, France. pp.160--165, ⟨10.1109/WETICE.2016.43⟩. ⟨hal-01368137⟩

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