A non-foster circuit design for antenna miniaturization - Archive ouverte HAL Access content directly
Conference Papers Year : 2016

A non-foster circuit design for antenna miniaturization


In this paper, a non-Foster circuit for achieving a negative small capacitance based on Linvill floating-type Negative Impedance Convertor (NIC) is realized. The effect of the parasitic elements and the transmission lines on the circuit performance is discussed. The experimental results show that the circuit presents a negative capacitor of 0.87pF in the UHF band. The circuit linearity test reveals a high output 1dB gain compression point at 7.8dBm and an output saturation point at 15.6dBm. Furthermore, the circuit has relatively high inter-modulation Output Intercept Points (OIPs). © 2016 IEICE.
Not file

Dates and versions

hal-01484542 , version 1 (07-03-2017)


  • HAL Id : hal-01484542 , version 1


Abdullah Haskou, D. Lemur, Sylvain Collardey, A. Sharaiha. A non-foster circuit design for antenna miniaturization. 21st International Symposium on Antennas and Propagation, ISAP 2016, Oct 2016, MashikiGinowan, Japan. pp.286--287. ⟨hal-01484542⟩
102 View
0 Download


Gmail Facebook Twitter LinkedIn More