Hypervisor mechanisms to manage FPGA reconfigurable accelerators

Abstract : In the last decade, the research on CPU-FPGA hybrid architectures has become a hot topic. One of the main challenges in this domain consists in efficiently and safely managing dynamic partial reconfiguration (DPR) resources. This paper focuses on the management of the reconfiguration by an hypervisor on an ARM-FPGA platform. Using the virtualization approach, virtual machines (VM) may access resources independently, being unaware of the existence of other VMs. The purpose of our work is to provide an abstract and transparent interface for virtual machines to access reconfigurable resources. The underlying infrastructure of partial reconfiguration management is hidden from the virtual machines, so that software developers do not need to consider the implementation details. We propose a framework where DPR accelerators are presented as virtual devices, which are universally mapped in each VM space as ordinary peripherals. The hypervisor automatically detects VM's requests for DPR resources and handles them dynamically according to a preemptive allocation mechanism. Our custom hypervisor guarantees the independent and isolation of VM domains. We also evaluate the efficiency of our framework by measuring the critical overheads during DPR management and allocations. The results demonstrate that our mechanism is implemented with low overhead. © 2016 IEEE.
Type de document :
Communication dans un congrès
15th International Conference on Field-Programmable Technology, FPT 2016, Dec 2016, Kyoto, Japan. 〈10.1109/FPT.2016.7929187〉
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https://hal-univ-rennes1.archives-ouvertes.fr/hal-01622477
Contributeur : Laurent Jonchère <>
Soumis le : mardi 24 octobre 2017 - 14:12:15
Dernière modification le : mercredi 25 juillet 2018 - 16:50:04

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T. Xia, J.-C. Prévotet, F. Nouvel. Hypervisor mechanisms to manage FPGA reconfigurable accelerators. 15th International Conference on Field-Programmable Technology, FPT 2016, Dec 2016, Kyoto, Japan. 〈10.1109/FPT.2016.7929187〉. 〈hal-01622477〉

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