Parametric Optimization of a Non-Foster Circuit Embedded in an Electrically Small Antenna for Wideband and Efficient Performance

Hussein Jaafar (1) , Dominique Lemur (1) , Sylvain Collardey (1) , Ala Sharaiha (1)

1 IETR - Institut d'Électronique et des Technologies du numéRique

In this paper, we present the design of a small, wideband antenna with an embedded non-Foster circuit. The design procedure is based on modeling the antenna in the presence of the EM model of the negative impedance converter (NIC) and trying to optimize the components and location of this active circuit inside the antenna. The EM modeling of the circuit provides the possibility to identify the key parameters that mostly affect the performance of the antenna in terms of bandwidth and efficiency. These parameters are then optimized accordingly. This procedure is applied on a monopole antenna, which has its natural resonance at 2.2 GHz. With an embedded non-Foster circuit, the antenna is miniaturized to cover wideband frequencies around 900 MHz. Two examples are considered for different NIC topologies, after optimizing the components of the NIC, the best performance was given by the second antenna, which exhibits an impedance bandwidth of 50% (0.84-1.45 GHz) and total efficiency of 25%. The measurement results of both antennas are in good agreement with simulations showing a significant enhancement with respect to the passive antenna.

Keywords: Electrically small atenna; non-foster matching; miniaturization

Domains: Engineering Sciences [physics]

Hussein Jaafar, Dominique Lemur, Sylvain Collardey, Ala Sharaiha. Parametric Optimization of a Non-Foster Circuit Embedded in an Electrically Small Antenna for Wideband and Efficient Performance. IEEE Transactions on Antennas and Propagation, 2019, 67 (6), pp.3619-3628. ⟨10.1109/TAP.2019.2902614⟩. ⟨hal-02176473⟩