Hiding Communication Delays in Contention-Free Execution for SPM-Based Multi-Core Architectures

Benjamin Rouxel (1) , Stefanos Skalistis (1) , Steven Derrien (2) , Isabelle Puaut (1)

1 PACAP - Pushing Architecture and Compilation for Application Performance
2 CAIRN - Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources

Multi-core systems using ScratchPad Memories (SPMs) are attractive architectures for executing time-critical embedded applications, because they provide both predictability and performance. In this paper, we propose a scheduling technique that jointly selects SPM contents off-line, in such a way that the cost of SPM loading/unloading is hidden. Communications are fragmented to augment hiding possibilities. Experimental results show the effectiveness of the proposed technique on streaming applications and synthetic task-graphs. The overlapping of communications with computations allows the length of generated schedules to be reduced by 4% on average on streaming applications, with a maximum of 16%, and by 8% on average for synthetic task graphs. We further show on a case study that generated schedules can be implemented with low overhead on a predictable multi-core architecture (Kalray MPPA).

Mots clés: Real-time Systems; Contention-Free Scheduling; SPM multi-core architecture

Domaines: Architectures Matérielles [cs.AR]; Systèmes embarqués

Benjamin Rouxel, Stefanos Skalistis, Steven Derrien, Isabelle Puaut. Hiding Communication Delays in Contention-Free Execution for SPM-Based Multi-Core Architectures. ECRTS 2019 - 31st Euromicro Conference on Real-Time Systems, Jul 2019, Stuttgart, Germany. pp.1-24, ⟨10.4230/LIPIcs.ECRTS.2019.25⟩. ⟨hal-02190271⟩