DAMHSE Programming heterogeneous MPSoCs with hardware acceleration using dataflow-based design space exploration and automated rapid prototyping

L. Suriano 1 F. Arrestier 2 A. Rodríguez 1 Julien Heulot 2 K. Desnos 2 Maxime Pelcat 2 E.D.L. Torre 1
1 UPM - Universidad Politécnica de Madrid
2 IETR - Institut d'Electronique et de Télécommunications de Rennes
Keywords : Dataflow models of computation Runtime hardware manager Self-adaptivity MPSoC PREESM SDSoC Rapid prototyping Heterogeneous multi-core embedded system Hybrid CPU/FPGA system Hardware acceleration Design space exploration Hardware-Software co-design
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Journal articles
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https://hal-univ-rennes1.archives-ouvertes.fr/hal-02309549
Contributor : Laurent Jonchère <>
Submitted on : Wednesday, October 9, 2019 - 12:59:35 PM
Last modification on : Thursday, October 24, 2019 - 1:41:40 PM

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UNIV-RENNES1 | IETR | CNRS | UR1-UFR-ISTIC | UNIV-NANTES | UNIV-RENNES | INSA-GROUPE

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L. Suriano, F. Arrestier, A. Rodríguez, Julien Heulot, K. Desnos, et al.. DAMHSE Programming heterogeneous MPSoCs with hardware acceleration using dataflow-based design space exploration and automated rapid prototyping. Microprocessors and Microsystems, 2019, 71, pp.102882. ⟨10.1016/j.micpro.2019.102882⟩. ⟨hal-02309549⟩

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