StAMP: Static Analysis of Memory access Profiles for real-time tasks

Théo Degioanni (1) , Isabelle Puaut (2)

1 ENS Rennes - École normale supérieure - Rennes
2 PACAP - Pushing Architecture and Compilation for Application Performance

Accesses to shared resources in multi-core systems raise predictability issues. The delay in accessing a resource for a task executing on a core depends on concurrent resource sharing from tasks executing on the other cores. In this paper, we present StAMP, a compiler technique that splits the code of tasks into a sequence of code intervals intervals, each with a distinct worst-case memory access profile. The intervals identified by StAMP can serve as inputs to scheduling techniques for a tight calculation of worst-case delays of memory accesses. The provided information can also ease the design of mechanisms that avoid and/or control interference between tasks at run-time. An important feature of StAMP compared to related work lies in its ability to link back time intervals to unique locations in the code of tasks, allowing easy implementation of elaborate run-time decisions related to interference management.

Mots clés: Worst-Case Execution Time Estimation; Static Analysis; Multicore; Interference; Implicit Path Enumeration Technique; 2012 ACM Subject Classification Computer systems organization → Real-time systems; Computer systems organization → Embedded systems phrases Worst-Case Execution Time Estimation Static Analysis Multicore Interference Implicit Path Enumeration Technique; Computer systems organization → Embedded systems phrases Worst-Case Execution Time Estimation

Domaines: Architectures Matérielles [cs.AR]; Informatique et langage [cs.CL]; Systèmes embarqués; Performance et fiabilité [cs.PF]

Théo Degioanni, Isabelle Puaut. StAMP: Static Analysis of Memory access Profiles for real-time tasks. WCET 2022 - 20th International Workshop on Worst-Case Execution Time Analysis, Jul 2022, Modena, Italy. ⟨10.4230/OASIcs.WCET.2022.1⟩. ⟨hal-03723457⟩